The use of firewalls in today’s networks is essential. Most current firewalls use software based matching approaches on traditional processors for filtering each packet.
Even today it is almost impossible for a normal CPU to inspect and filter every data packet of a 10 Gb/s network interface.
In order to have firewalls operating at the edge of saturated link speeds in future this task will have to be performed by special hardware. Reconfigurable circuits like FPGAs are a solution to this problem, where arbitrary exchangable modules of logic can be loaded.
By using this technique, one gains the flexibility of a software approach as well as the speed of a hardware based solution.
The hardFIRE project will develop tools and methods that allow to synthesize specific firewall rules and load them into a FPGA. This will enable the firewall manufacturer genua to address the challenges of tomorrow.